Changes between Initial Version and Version 1 of AlixAPU_biosupdate2

Timestamp:

Dec 8, 2014, 6:24:03 PM (9 years ago)

Author:

ed

Comment:

--

AlixAPU_biosupdate2

@@ +1 @@
+
+{{{
+PC Engines APU BIOS build date: Apr  5 2014
+Reading data from file [bootorder]
+SeaBIOS (version ?-20140405_120742-frink)
+SeaBIOS (version ?-20140405_120742-frink)
+Found coreboot cbmem console @ 7e150400
+Found mainboard PC Engines APU
+Relocating init from 0x000e8e71 to 0x7e1065e0 (size 39259)
+Found CBFS header at 0xfffffb90
+found file "bootorder" in cbmem
+CPU Mhz=1000
+Found 28 PCI devices (max PCI bus is 05)
+Copying PIR from 0x7e160400 to 0x000f27a0
+Copying MPTABLE from 0x7e161400/7e161410 to 0x000f25b0 with length 1ec
+Copying ACPI RSDP from 0x7e162400 to 0x000f2590
+Copying SMBIOS entry point from 0x7e16d800 to 0x000f2570
+Using pmtimer, ioport 0x808
+Scan for VGA option rom
+EHCI init on dev 00:12.2 (regs=0xf7f08420)
+Found 1 lpt ports
+Found 2 serial ports
+AHCI controller at 11.0, iobase f7f08000, irq 11
+EHCI init on dev 00:13.2 (regs=0xf7f08520)
+EHCI init on dev 00:16.2 (regs=0xf7f08620)
+Searching bootorder for: /rom@img/setup
+Searching bootorder for: /rom@img/memtest
+OHCI init on dev 00:12.0 (regs=0xf7f04000)
+OHCI init on dev 00:13.0 (regs=0xf7f05000)
+OHCI init on dev 00:14.5 (regs=0xf7f06000)
+OHCI init on dev 00:16.0 (regs=0xf7f07000)
+Searching bootorder for: /pci@i0cf8/usb@16,2/storage@1/*@0/*@0,0
+Searching bootorder for: /pci@i0cf8/usb@16,2/usb-*@1
+USB MSC vendor='Multiple' product='Card  Reader' rev='1.00' type=0 removable=1
+USB MSC blksize=512 sectors=7706624
+All threads complete.
+Scan for option roms
+Running option rom at c000:0003
+
+
+iPXE (http://ipxe.org) 00:00.0 C000 PCI2.10 PnP PMMpmm call arg1=1
+pmm call arg1=0
++7E0DA590pmm call arg1=1
+pmm call arg1=0
++7E03A590 C000
+                                                                               
+
+
+Searching bootorder for: /rom@genroms/pxeboot.rom
+
+Build date: Apr  5 2014
+System memory size: 2017 MB
+
+Press F12 for boot menu.
+
+Searching bootorder for: HALT
+drive 0x000f2520: PCHS=0/0/0 translation=lba LCHS=955/128/63 s=7706624
+Space available for UMB: c1000-ee800, f0000-f2520
+Returned 245760 bytes of ZoneHigh
+e820 map has 6 items:
+  0: 0000000000000000 - 000000000009fc00 = 1 RAM
+  1: 000000000009fc00 - 00000000000a0000 = 2 RESERVED
+  2: 00000000000f0000 - 0000000000100000 = 2 RESERVED
+  3: 0000000000100000 - 000000007e14c000 = 1 RAM
+  4: 000000007e14c000 - 000000007f000000 = 2 RESERVED
+  5: 00000000f8000000 - 00000000f9000000 = 2 RESERVED
+enter handle_19:
+  NULL
+Booting from Hard Disk...
+Booting from 0000:7c00
+
+SYSLINUX 4.06 EDD 2012-10-23 Copyright (C) 1994-2012 H. Peter Anvin et al
+
+SYSLINUX 4.06 2012-10-23 Copyright (C) 1994-2012 H. Peter Anvin et al
+Loading vmlinuz.....
+Loading core.gz...............ready.
+
+  ____   ____   _____             _                 
+ |  _ \ / ___| | ____|_ __   __ _(_)_ __   ___  ___ 
+ | |_) | |     |  _| | '_ \ / _` | | '_ \ / _ \/ __|
+ |  __/| |___  | |___| | | | (_| | | | | |  __/\__ \
+ |_|    \____| |_____|_| |_|\__, |_|_| |_|\___||___/
+                            |___/
+
+TinyCore www.tinycorelinux.com
+
+searching for home directory ...
+                                                              
+
+
+Welcome to TinyCore running on APU
+To update the BIOS type "flashrom -w apu140405.rom"
+
+[+41.0 C][root@box:/mnt/sda1]$ flashrom -w apu140405.rom 
+flashrom v0.9.7-r1711-APU on Linux 3.8.13-tinycore (i686)
+flashrom is free software, get the source code at http://www.flashrom.org
+
+Using default programmer "internal".
+Calibrating delay loop... OK.
+coreboot table found at 0x7efdf000.
+Found chipset "AMD SB7x0/SB8x0/SB9x0". Enabling flash write... OK.
+Found Macronix flash chip "MX25L1605A/MX25L1606E" (2048 kB, SPI) at physical address 0xffe00000.
+Reading old flash chip contents... done.
+Erasing and writing flash chip... Erase/write done.
+[+45.0 C][root@box:/mnt/sda1]$
+
+}}}